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rev. 2.0 12/10 page 1 of 16 v?i chip inc. (a vicor company) 25 frontage rd. andover, ma 01810 800-735-6200 vicorpower.com bcm48bh120t120a00 BCM48BH120M120A00 (formerly vib0101thj) features ? 48 vdc ? 12 vdc 120 w bus converter ? high efficiency (>95%) reduces system power consumption ? high power density (801 w/in 3 ) reduces power system footprint by >50% ? ?half chip? v ? i chip package enables surface mount, low impedance interconnect to system board ? contains built-in protection features: undervoltage, overvoltage lockout, over current protection, short circuit protection, overtemperature protection. ? provides enable/disable control, internal temperature monitoring ? zvs/zcs resonant sine amplitude converter topology ? less than 50c temperature rise at full load in typical applications typical application ? high end computing systems ? automated test equipment ? telecom base stations ? high density power supplies ? communication systems description the v ? i chip tm bus converter is a high efficiency (>95%) sine amplitude converter tm (sac tm ) operating from a 38 to 55 vdc primary bus to deliver an isolated 12 v nominal, unregulated secondary. the sac offers a low ac impedance beyond the bandwidth of most downstream regulators, meaning that input capacitance normally located at the input of a 12 v regulator can be located at the input to the sac. since the k factor of the bcm48bh120t120a00 is 1/4, that capacitance value can be reduced by a factor of 16x, resulting in savings of board area, materials and total system cost. the bcm48bh120t120a00 is provided in a v ? i chip package compatible with standard pick-and-place and surface mount assembly processes. the v ? i chip package provides flexible thermal management through its low junction-to-case and junction-to-board thermal resistance. with high conversion efficiency the bcm48bh120t120a00 increases overall system efficiency and lowers operating costs compared to conventional approaches. sw1 enable / disable switch f1 v c1 pol pol pol pol 10 f -in +in pc tm -out +out bcm in v out 3.15 a typical application bcm tm bus converter v in = 38 ? 55 v v out = 9.5 ? 13.75 v ( no load ) p out = 120 w (nom) k = 1/4 s nrtl c us part number description bcm48bh120t120a00 -40c ? 125c t j , j lead
rev. 2.0 12/10 page 2 of 16 v?i chip inc. (a vicor company) 25 frontage rd. andover, ma 01810 800-735-6200 vicorpower.com preliminary datasheet bcm48bh120t120a00 - BCM48BH120M120A00 absolute maximum ratings +in to ?in . . . . . . . . . . . . . . . . . . . . . . . . . -1.0 vdc ? +60 vdc pc to ?in . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 vdc ? +20 vdc tm to ?in . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 vdc ? +7.0 vdc +in/-in to +out/-out . . . . . . . . . . . . . . . . . . . 2250 v (hi pot) +in/-in to +out/-out . . . . . . . . . . . . . . . . . . . . 60 v (working) +out to ?out . . . . . . . . . . . . . . . . . . . . . . -1.0 vdc - +16 vdc temperature during reflow . . . . . . . . . . . . . . . . 245c (msl 6) package ordering information control pin specifications see section 5.0 for further application details and guidelines . pc (v ? i chip bcm primary control) the pc pin can enable and disable the bcm. when held below v pc - dis the bcm shall be disabled. when allowed to float with an impedance to ?in of greater than 60 k the module will start. when connected to another bcm pc pin (either directly, or isolated through a diode), the bcms will start simultane- ously when enabled. the pc pin is capable of being either driven high by an external logic signal or internal pull up to 5 v (operating). tm (v ? i chip bcm temperature monitor) the tm pin monitors the internal temperature of the bcm within an accuracy of +5/-5 c. it has a room temperature setpoint of ~3.0 v and an approximate gain of 10 mv/c. it can source up to 100 ua and may also be used as a ?power good? flag to verify that the bcm is operating. pc nc tm nc bottom view 4 3 2 1 +out -out +in -in a b c d j k l m e f g h signal name designation +in a1-b1, a2-b2 ?in l1-m1, l2-m2 nc e1 tm f2 nc g1 pc h2 +out a3-d3, a4-d4 ?out j3-m3, j4-m4
rev. 2.0 12/10 page 3 of 16 v?i chip inc. (a vicor company) 25 frontage rd. andover, ma 01810 800-735-6200 vicorpower.com bcm48bh120t120a00 - BCM48BH120M120A00 attribute symbol conditions / notes min typ max unit voltage range v in 38 48 55 vdc dv/dt dv in /dt 1 v/s quiescent power p q pc connected to -in 68 150 mw no load power dissipation p nl v in = 48 v 1.7 3.0 w v in = 38 to 55 v 3.5 inrush current peak i inr - p v in = 48 v c out = 500 f, 5.5 12 a i out = 10.55 a dc input current i in - dc 3.5 a k factor ( v out ) k 1/4 v in output power (average) p out v in = 38 ? 55 vdc; see figure 14 97 w v in = 46 ? 55 vdc; see figure 14 120 output power (peak) p out - p v in = 46 ? 55 vdc 150 w average p out < = 120 w, tpeak < 10 ms output voltage v out section 3.0 8.5 14 v output current (average) i out pout < =120 w 11.3 a efficiency (ambient) v in = 48 v, p out = 120 w 93 94.6 % v in = 38 v to 55 v, p out = 100 w 90.5 efficiency (hot) v in = 48 v, t j = 100c, p out = 120 w 92.6 93.7 % minimum efficiency 24 w < p out < p out max 89 % (over load range) output resistance (ambient) r out t j = 25c 35.4 44.1 55.8 m output resistance (hot) r out t j = 125c 46.1 56.1 69.1 m output resistance (cold) r out t j = -40c 27.2 35.0 45.7 m load capacitance c out 500 uf switching frequency f sw 1.60 1.75 1.90 mhz ripple frequency f sw - rp 3.20 3.50 3.80 mhz output voltage ripple v out - pp c out = 0 f, i out = 10.55 a , v in = 48 v, 140 355 mv section 8.0 v in to v out (application of v in )t on 1 v in = 48 v, c pc = 0; see figure 16 570 800 ms pc pc voltage (operating) v pc 4.7 5.0 5.3 v pc voltage (enable) v pc - en 2.0 2.5 3.0 v pc voltage (disable) v pc - dis 1.95 v pc source current (startup) i pc - en 50 100 300 ua pc source current (operating) i pc - op 2 ma pc internal resistance r pc - snk internal pull down resistor 50 150 400 k pc capacitance (internal) c pc _ int section 5.0 588 pf pc capacitance (external) c pc _ ext external capacitance delays pc enable time 1000 pf external pc resistance r pc connected to ?v in 60 k pc external toggle rate f pc - tog 1 hz pc to v out with pc released ton2 v in = 48 v, pre-applied; see figure 16 60 100 s pc to v out , disable pc t pc - dis v in = 48 v, pre-applied; see figure 16 4 10 s 1.0 electrical characteristics specifications apply over all line and load conditions unless otherwise noted; boldface specifications apply over the temperature range of -40c < t j < 125c (t-grade) ; all other specifications are at t j = 25o unless otherwise noted
rev. 2.0 12/10 page 4 of 16 v?i chip inc. (a vicor company) 25 frontage rd. andover, ma 01810 800-735-6200 vicorpower.com preliminary datasheet bcm48bh120t120a00 - BCM48BH120M120A00 1.0 electrical characteristics (cont.) specifications apply over all line and load conditions unless otherwise noted; boldface specifications apply over the temperature range of -40c < t j < 125c (t-grade) ; all other specifications are at t j = 25o unless otherwise noted attribute symbol conditions / notes min typ max unit tm tm accuracy actm -5 +5 oc tm gain a tm 10 mv/c tm source current i tm 100 ua tm internal resistance r tm - snk 25 40 50 k external tm capacitance c tm 50 pf tm voltage ripple v tm - pp c tm = 0 uf, v in = 55 v, p out = 120 w 75 180 250 mv protection negative going ovlo v in ovlo - 55.1 57.8 59.4 v positive going ovlo v in ovlo + 55.5 58.1 59.4 v negative going uvlo v in uvlo - 29.1 30.8 35.4 v positive going uvlo v in uvlo + 30.7 32.6 37.3 v output overcurrent trip i ocp v in = 48 v, 25c 12 20 25 a short circuit protection i ssp 15 40 a trip current short circuit protection t ssp 0.8 1.0 1.2 us response time thermal shutdown t j - otp 125 130 135 c junction setpoint general specification isolation voltage (hi-pot) v hipot 2250 v working voltage (in ? out) vworking 60 v isolation vapacitance c in - out unpowered unit 1350 1750 2150 pf isolation resistance r in - out 10 m mtbf mil hdbk 217f, 25c, gb 7.1 mhrs ctuvus agency approvals / standards ce mark rohs 6 of 6
rev. 2.0 12/10 page 5 of 16 v?i chip inc. (a vicor company) 25 frontage rd. andover, ma 01810 800-735-6200 vicorpower.com bcm48bh120t120a00 - BCM48BH120M120A00 1.1 application characteristics all specifications are at t j = 25oc unless otherwise noted. see associated figures for general trend data. attribute symbol conditions / notes typ unit no load power p nl v in = 48 v, pc enabled; see figure 1 1.75 w inrush current peak i nr - p c out = 500 f, p out = 120 w 6a efficiency (ambient) v in = 48 v, p out = 120 w 95 % c out = 500 f efficiency (hot ? 100c) v in = 48 v, p out = 120 w 94 % c out = 500 f output resistance (-40c) r out _ c v in = 48 v 35 m output resistance (25c) r out _ r v in = 48 v 44 m output resistance (100c) r out _ h v in = 48 v 56 m output voltage ripple v out - pp c out = 0uf, p out = 120 w @ v in = 48, 160 mv v in = 48 v v out transient (positive) v out - tran + i out _ step = 0 to 10.55 a , 1.4 v i slew >10 a/us; see figure 12 v out transient (negative) v out - tran - i out _ step = 10.55 a to 0 a, 1.3 v i slew > 10 a/us; see figure 11 undervoltage lockout t uvlo 2.4 us response time output overcurrent t ocp 12 < i ocp < 25 a 4.4 ms response time overvoltage lockout t ovlo 2.4 s response time
rev. 2.0 12/10 page 6 of 16 v?i chip inc. (a vicor company) 25 frontage rd. andover, ma 01810 800-735-6200 vicorpower.com preliminary datasheet bcm48bh120t120a00 - BCM48BH120M120A00 1 1.5 2 2.5 3 38 40 42 44 46 47 49 51 53 55 no load power dissipation vs. line -40? 25? 100? t case : no load power dissipation (w) input voltage (v) v : in 38 v 48 v 55 v 91 92 93 94 95 96 -40 -20 0 20 40 60 80 100 full load efficiency vs. case temperature case temperature (c) efficiency (%) 0 2 4 6 8 10 12 14 16 80 82 84 86 88 90 92 94 96 0 2 4 6 8 10 12 p d 38 v 48 v 55 v v : in 38 v 48 v 55 v efficiency & power dissipation -40c case output load (a) efficiency (%) power dissipation (w) 0 2 4 6 8 10 12 14 16 80 82 84 86 88 90 92 94 96 0 2 4 6 8 10 12 p d 38 v 48 v 55 v v : in 38 v 48 v 55 v efficiency & power dissipation 25c case output load (a) efficiency (%) power dissipation (w) 0 2 4 6 8 10 12 14 16 80 82 84 86 88 90 92 94 96 0 2 4 6 8 10 12 p d efficiency & power dissipation 100c case efficiency (%) power dissipation (w) output load (a) 38 v 48 v 55 v v : in 38 v 48 v 55 v 20 25 30 35 40 45 50 55 60 -40 -20 0 20 40 60 80 100 r out vs. casetemperature temperature (c) r out (m ) i : out 1.05 a 10.55 a figure 1 ? no load power dissipation vs. v in ; t case figure 2 ? full load efficiency vs. temperature; v in figure 3 ? efficiency and power dissipation at -40c (case); v in figure 4 ? efficiency and power dissipation at 25c (case); v in figure 5 ? efficiency and power dissipation at 100c (case); v in figure 6 ? r out vs. temperature vs. i out
rev. 2.0 12/10 page 7 of 16 v?i chip inc. (a vicor company) 25 frontage rd. andover, ma 01810 800-735-6200 vicorpower.com bcm48bh120t120a00 - BCM48BH120M120A00 output voltage ripple 25? vs. i out 0 20 40 60 80 100 120 140 160 180 024 6 8 10 i out (a) vripple (mv) figure 7 ? vripple vs. i out ; 48 vin, no external capacitance figure 8 ? pc to v out startup waveform figure 9 ? v in to v out startup waveform figure 10 ? output voltage and input current ripple, 48 vin, 120 w no c out figure 11 ? positive load transient (0 ? 11.3 a) figure 12 ? negative load transient (11.3 a ? 0 a)
rev. 2.0 12/10 page 8 of 16 v?i chip inc. (a vicor company) 25 frontage rd. andover, ma 01810 800-735-6200 vicorpower.com preliminary datasheet bcm48bh120t120a00 - BCM48BH120M120A00 attribute symbol conditions / notes min typ max unit length l 21.7 / 0.854 22.0 / 0.866 22.3 / 0.878 mm/in width w 16.37 / 0.644 16.50 / 0.650 16.63 / 0.655 mm/in height h 6.48 / 0.255 6.73 / 0.265 6.98 / 0.275 mm/in volume vol no heatsink 2.44 / 0.150 cm 3 /in 3 footprint f no heatsink 3.6 / 0.56 cm 2 /in 2 power density p d no heatsink 801 w/in 3 49 w/cm 3 weight w 0.28/8 oz/g lead finish nickel (0.51-2.03 m) palladium (0.02-0.15 m) gold (0.003-0.05 m) operating temperature t j -40 125 c storage temperature t st -40 125 c thermal impedance ? jc junction to case 2.7 c/w thermal capacity 5 ws/c peak compressive force supported by j-leads only 2.5 3.0 lbs applied to case (z-axis) esd rating esd hbm human body model [a] 1500 v dc esd mm machine model [b] 400 v dc peak temperature during reflow msl 5 225 c msl 6 245 c peak time above 183c 150 s peak heating rate during reflow 1.5 3 c/s peak cooling rate post reflow 1.5 6 c/s 2.0 package/mechanical specifications all specifications are at t j = 25oc unless otherwise noted. see associated figures for general trend data. figure 13 ? pc disable waveform, 48 v in , 500 f c out full load 97 120 38 46 55 p (w) out v (v dc ) in figure 14 ? p out derating vs. v in [a] jedec jesd 22-a114c.01 [b] jeded jesd 22-a115-a
rev. 2.0 12/10 page 9 of 16 v?i chip inc. (a vicor company) 25 frontage rd. andover, ma 01810 800-735-6200 vicorpower.com bcm48bh120t120a00 - BCM48BH120M120A00 top view ( component side ) bottom view inch mm notes: . dimensions are . 2. unless otherwise specified, tolerances are: .x / [.xx] = +/-0.25 / [.01]; .xx / [.xxx] = +/-0.13 / [.005] 3. p roduct marking on top surface dxf and pdf files are available on vicorpower.com 4 2.1 mechanical drawing 2.2 recommended land pattern mm (inch) notes: 1. maintain 3.50 (0.138) dia. keep-out zone free of copper, all pcb layers. 2. (a) minimum recommended pitch is 24.00 (0.945) this provides 7.50 (0.295) component edge?o?dge spacing, and 0.50 (0.020) clearance between vicor heat sinks. (b) minimum recommended pith is 25.50 (1.004). this provides 9.00 (0.354) component edge?o?dge spacing, and 2.00 (0.079) clearance between vicor heat sinks. 3. v? chip land pattern shown for reference only, actual land pattern may differ. dimensions from edges of land pattern to push?in holes will be the same for all half size v? chip products. 4. rohs compliant per cst?001 latest revision. 5. unless otherwise specified: dimensions are mm (inches) tolerances are: x.x (x.xx) = ?.3 (0.01) x.xx (x.xxx) = ?.13 (0.005) 6. plated through holes for grounding clips (33855) shown for reference, heatsink orientation and device pitch will dictate final grounding solution. (no grounding clips) (with grounding clips) 2.3 recommended land pattern for push pin heatsink pc nc tm nc bottom view 4 3 2 1 +out -out +in -in a b c d j k l m e f g h inch mm notes: . dimensions are . 2. unless otherwise specified, tolerances are: .x / [.xx] = +/-0.25 / [.01]; .xx / [.xxx] = +/-0.13 / [.005] 3. p roduct marking on top surface dxf and pdf files are available on vicorpower.com 4 recommended land pattern ( component side shown ) signal name designation +in a1-b1, a2-b2 ?in l1-m1, l2-m2 nc e1 tm f2 nc g1 pc h2 +out a3-d3, a4-d4 ?out j3-m3, j4-m4
rev. 2.0 12/10 page 10 of 16 v?i chip inc. (a vicor company) 25 frontage rd. andover, ma 01810 800-735-6200 vicorpower.com preliminary datasheet bcm48bh120t120a00 - BCM48BH120M120A00 3.0 power, voltage, efficiency relationships because of the high frequency, fully resonant sac topology, power dissipation and overall conversion efficiency of bcm converters can be estimated as shown below. key relationships to be considered are the following: 1. transfer function a. no load condition v out = v in ? k eq. 1 where k (transformer turns ratio) is constant for each part number b. loaded condition v out = vin ? k ? i out ? r out eq. 2 2. dissipated power the two main terms of power losses in the bcm module are: - no load power dissipation (p nl ) defined as the power used to power up the module with an enabled power train at no load. - resistive loss (r out ) refers to the power loss across the bcm modeled as pure resistive impedance. p dissipated ~ p nl + p r out eq. 3 ~ therefore, with reference to the diagram shown in figure 15 p out = p in ?p dissipated = p in ?p nl ?p r out eq. 4 notice that r out is temperature and input voltage dependent and p nl is temperature dependent (see figure 15). input power output power p nl p r out figure 15 ? power transfer diagram the above relations can be combined to calculate the overall module efficiency: = p out = p in ?p nl ?p r out = p in p in v in ? i in ?p nl ?(i out ) 2 ? r out =1 ? ( p nl + (i out ) 2 ? r out ) v in ? i in v in ? i in eq. 5
rev. 2.0 12/10 page 11 of 16 v?i chip inc. (a vicor company) 25 frontage rd. andover, ma 01810 800-735-6200 vicorpower.com bcm48bh120t120a00 - BCM48BH120M120A00 4.0 operating 12 3 4 5 6 v uvlo + pc 5 v 3 v ll ? k a: t on1 b: t ovlo* c: max recovery time d:t uvlo e: t on2 f: t ocp g: t pcCdis h: t ssp** 1: controller start 2: controller turn o 3: pc release 4: pc pulled low 5: pc released on output sc 6: sc removed vout tm 3 v @ 27c 0.4 v v in 3 v 5 v 2.5 v 500ms before retrial v uvlo C a b e h i ssp i out i ocp g f d c v ovlo + v ovlo C v ovlo + nl notes: C timing and voltage is not to scale C error pulse width is load dependent *min value switching o **from detection of error to power train shutdown c figure 16 ? timing diagram
rev. 2.0 12/10 page 12 of 16 v?i chip inc. (a vicor company) 25 frontage rd. andover, ma 01810 800-735-6200 vicorpower.com preliminary datasheet bcm48bh120t120a00 - BCM48BH120M120A00 5.0 using the control signals tm and pc the pc control pin can be used to accomplish the following functions: ? delayed start: at start-up, pc pin will source a constant 100 ua current to the internal rc network. adding an external capacitor will allow further delay in reaching the 2.5 v threshold for module start. ? synchronized start up: in a parallel module array, pc pins shall be connected in order to ensure synchronous start of all the units. while every controller has a calibrated 2.5 v reference on pc comparator, many factors might cause different timing in turning on the 100 ua current source on each module, i.e.: ? different v in slew rate ? statistical component value distribution by connecting all pc pins, the charging transient will be shared and all the modules will be enabled synchronously. ? auxiliary voltage source: once enabled in regular operational conditions (no fault), each bcm pc provides a regulated 5 v, 2 ma voltage source. ? output disable: pc pin can be actively pulled down in order to disable module operations. pull down impedance shall be lower than 1 k and toggle rate lower than 1 hz. ? fault detection flag: the pc 5 v voltage source is internally turned off as soon as a fault is detected. after a minimum disable time, the module tries to re-start, and pc voltage is re-enabled. for system monitoring purposes (microcontroller interface) faults are detected on falling edges of pc signal. it is important to notice that pc doesn?t have current sink capability (only 150 k typical pull down is present), therefore, in an array, pc line will not be capable of disabling all the modules if a fault occurs on one of them. the temperature monitor (tm) pin provides a voltage propor- tional to the absolute temperature of the converter control ic. it can be used to accomplish the following functions: ? monitor the control ic temperature: the temperature in kelvin is equal to the voltage on the tm pin scaled by x100. (i.e. 3.0 v = 300 k = 27oc). it is important to remember that v ? i chips are multi-chip modules, whose temperature distribution greatly vary for each part number as well with input/output conditions, thermal management and environmental conditions. therefore, tm cannot be used to thermally protect the system. ? fault detection flag: the tm voltage source is internally turned off as soon as a fault is detected. after a minimum disable time, the module tries to re-start, and tm voltage is re-enabled. 6.0 fuse selection v ? i chips are not internally fused in order to provide flexibility in configuring power systems. input line fusing of v ? i chips is recommended at system level, in order to provide thermal protection in case of catastrophic failure. the fuse shall be selected by closely matching system requirements with the following characteristics: ? current rating (usually greater than maximum bcm current) ? maximum voltage rating (usually greater than the maximum possible input voltage) ? ambient temperature ? nominal melting i 2 t ? recommended fuse: 3.15 a little fuse nano 2 fuse
rev. 2.0 12/10 page 13 of 16 v?i chip inc. (a vicor company) 25 frontage rd. andover, ma 01810 800-735-6200 vicorpower.com bcm48bh120t120a00 - BCM48BH120M120A00 7.0 current sharing the sac topology bases its performance on efficient transfer of energy through a transformer, without the need of closed loop control. for this reason, the transfer characteristic can be approximated by an ideal transformer with some resistive drop and positive temperature coefficient. this type of characteristic is close to the impedance characteristic of a dc power distribution system, both in behavior (ac dynamic) and absolute value (dc dynamic). when connected in an array (with same k factor), the bcm module will inherently share the load current with parallel units, according to the equivalent impedance divider that the system implements from the power source to the point of load. it is important to notice that, when successfully started, bcms are capable of bidirectional operations (reverse power transfer is enabled if the bcm input falls within its operating range and the bcm is otherwise enabled). in parallel arrays, because of the resistive behavior, circulating currents are never experienced, because of energy conservation law. general recommendations to achieve matched array impedances are (see also an016 for further details): ? to dedicate common copper planes within the pcb to deliver and return the current to the modules ? to make the pcb layout as symmetric as possible ? to apply same input/output filters (if present) to each unit figure 17 ? bcm array
rev. 2.0 12/10 page 14 of 16 v?i chip inc. (a vicor company) 25 frontage rd. andover, ma 01810 800-735-6200 vicorpower.com preliminary datasheet bcm48bh120t120a00 - BCM48BH120M120A00 8.0 input and output filter design a major advantage of sac systems versus conventional pwm converters is that the transformers do not require large functional filters. the resonant lc tank, operated at extreme high frequency, is amplitude modulated as a function of input voltage and output current, and efficiently transfers charge through the isolation transformer. a small amount of capacitance, embedded in the input and output stages of the module, is sufficient for full functionality and is key to achieve power density. this paradigm shift requires system design to carefully evaluate external filters in order to: 1. guarantee low source impedance: to take full advantage of the bcm dynamic response, the impedance presented to its input terminals must be low from dc to approximately 5 mhz. the connection of the v ? i chip to its power source should be implemented with minimal distribution inductance. if the interconnect inductance exceeds 100 nh, the input should be bypassed with a rc damper to retain low source impedance and stable operation. with an interconnect inductance of 200 nh, the rc damper may be as high as 47 f in series with 0.3 . a single electrolytic or equivalent low-q capacitor may be used in place of the series rc bypass. 2. further reduce input and/or output voltage ripple without sacrificing dynamic response: given the wide bandwidth of the bcm, the source response is generally the limiting factor in the overall system response. anomalies in the response of the source will appear at the output of the bcm multiplied by its k factor. this is illustrated in figures 11 and 12. 3. protect the module from overvoltage transients imposed by the system that would exceed maximum ratings and cause failures: the v ? i chip input/output voltage ranges shall not be exceeded. an internal overvoltage lockout function prevents operation outside of the normal operating input range. even during this condition, the powertrain is exposed to the applied voltage and power mosfets must withstand it. a criterion for protection is the maximum amount of energy that the input or output switches can tolerate if avalanched. total load capacitance at the output of the bcm shall not exceed the specified maximum. owing to the wide bandwidth and low output impedance of the bcm, low frequency bypass capacitance and significant energy storage may be more densely and efficiently provided by adding capacitance at the input of the bcm. at frequencies <500 khz the bcm appears as an impedance of r out between the source and load. within this frequency range capacitance at the input appears as effective capacitance on the output per the relationship defined in eq. 6. c out = c in eq. 6 k 2 this enables a reduction in the size and number of capacitors used in a typical system.
rev. 2.0 12/10 page 15 of 16 v?i chip inc. (a vicor company) 25 frontage rd. andover, ma 01810 800-735-6200 vicorpower.com bcm48bh120t120a00 - BCM48BH120M120A00 +vout -vout modulator +vin uvlo ovlo fast current limit slow current limit vref tm pc enable -vin 2.5 v 100 ua 5 v 2 ma 150 k 40 k 560 pf 18.5 v primary gate drive supply 2.5 v differential primary current sensing vref (125?) min. off time and restart one shot delay 320/540 ms wake-up power and logic pc pull-up & source voltage dependent temperature sensor over-current protection primary stage & resonant tank 1.5 k figure 1 ? bcm behavioral block diagram
rev. 2.0 12/10 page 16 of 16 v?i chip inc. (a vicor company) 25 frontage rd. andover, ma 01810 800-735-6200 vicorpower.com preliminary datasheet bcm48bh120t120a00 - BCM48BH120M120A00 vicor?s comprehensive line of power solutions includes high density ac-dc and dc-dc modules and accessory components, fully configurable ac-dc and dc-dc power supplies, and complete custom power systems. information furnished by vicor is believed to be accurate and reliable. however, no responsibility is assumed by vicor for its use. vicor components are not designed to be used in applications, such as life support systems, wherein a failure or malfunction could result in injury or death. all sales are subject to vicor?s terms and conditions of sale, which are available upon request. specifications are subject to change without notice. intellectual property notice vicor and its subsidiaries own intellectual property (including issued u.s. and foreign patents and pending patent applications) relating to the products described in this data sheet. interested parties should contact vicor's intel- lectual property department. the products described on this data sheet are protected by the following u.s. patents numbers: 5,945,130; 6,403,009; 6,710,257; 6,911,848; 6,930,893; 6,934,166; 6,940,013; 6,969,909; 7,038,917; 7,166,898; 7,187,263; 7,361,844; d496,906; d505,114; d506,438; d509,472; and for use under 6,975,098 and 6,984,965 vicor corporation 25 frontage road andover, ma, usa 01810 tel: 800-735-6200 fax: 978-475-6715 email customer service: custserv@vicorpower.com technical support: apps@vicorpower.com warranty vicor products are guaranteed for two years from date of shipment against defects in material or workmanship when in normal use and service. this warranty does not extend to products subjected to misuse, accident, or improper applica- tion or maintenance. vicor shall not be liable for collateral or consequential damage. this warranty is extended to the original purchaser only. except for the foregoing express warranty, vicor makes no warranty, express or implied, including, but not limited to, the warranty of merchantability or fitness for a particular purpose. vicor will repair or replace defective products in accordance with its own best judgement. for service under this war- ranty, the buyer must contact vicor to obtain a return material authorization (rma) number and shipping instructions. products returned without prior authorization will be returned to the buyer. the buyer will pay all charges incurred in re- turning the product to the factory. vicor will pay all reshipment charges if the product was defective within the terms of this warranty. information published by vicor has been carefully checked and is believed to be accurate; however, no responsibility is assumed for inaccuracies. vicor reserves the right to make changes to any products without further notice to improve reliability, function, or design. vicor does not assume any liability arising out of the application or use of any product or circuit; neither does it convey any license under its patent rights nor the rights of others. vicor general policy does not recommend the use of its components in life support applications wherein a failure or malfunction may directly threaten life or injury. per vicor terms and conditions of sale, the user of vicor components in life support applications assumes all risks of such use and indemnifies vicor against all damages.

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